Lab9500 Description - Detailed Description of the Lab9500 board

Heart of a Digital Course - The Lab9500 is the heart of an introductory digital design course

Picture of Lab9500 - Detailed Picture of the Lab9500 Board

Programming PLDs - Some history and new developments (JTAG) in programming PLDs

Experiments - Part I - Combinational Logic - Introduction

          Experiment - 100 - Checking out the Lab9500 Board
          Experiment - 110 - Logic Equations
          Experiment - 120 - Binary Adder
          Experiment - 130 - Decoders
          Experiment - 140 - Encoders
          Experiment - 150 - Multiplexors

Experiments - Part II - Registered logic and State Machines - Introduction

          Experiment - 200 - Counters
          Experiment - 210 - Using 60Hz as a Time-base
          Experiment - 213 - Pair of Dice
          Experiment - 215 - Up/Down Counter
          Experiment - 217 - Broadside Loadable Down Counter
          Experiment - 221 - Traffic Light State Machine
          Experiment - 223 - The Traffic Light Project
          Experiment - 225 - Traffic Light with Features

DDR Introduction - Introduction to Digital Design Review

Chapter 1 - Logic gates and digital families

Chapter 4 - Flip-Flops

Chapter 5 - State Machines and Registered logic

Lab9500 Schematic - Schematic for the Lab9500 board

U. Penn ABEL-Primer - ABEL-Primer by Jan Van der Spiegel of U. of Pennsylvania

XC9500XL Spec - Spec Sheet for the XC9500XL family of CPLDs

XC9572XL Spec - Spec Sheet for the XC9572XL CPLD

Footprint of 64-pin Flatpak - Mechanical drawing of VQ64 flatpack package used by XC9572XL on Lab9500